fpgaz

Been really flat out, not many posts lately. Teamed up with a small prop group of really cool guys, having a blast but more on that later.

The amount of fudzilla that`s out there about HFT and FPGA is pretty immense, yet stumbled across a fairly decent set of articles on the subject.

http://www.hftreview.com/pg/blog/mike/read/55950/fpga-hardware-accelerated-trading-part-one-who-what-where-and-why

http://www.hftreview.com/pg/blog/mike/read/56720/fpga-hardware-accelerated-trading-part-two-alternative-approaches

http://www.hftreview.com/pg/blog/mike/read/57349/fpga-hardware-accelerated-trading-part-three-programming

http://www.hftreview.com/pg/blog/mike/read/58189/fpga-hardware-accelerated-trading-part-four-challenges-and-constraints

Its more an assortment of comments from various vendors selling stuff/in the space.. SEO bait? maybe but does give a bit more realistic view.

fpga dev is the ultimate culture clash, you`ve got hw guys vs sw guys vs biz guys, everyone has their own vastly different view of reality.

hw guys say to the sw guys -> wtf there`s no reference model to code the rtl against?

sw guys says to hw guys -> wtf is this timing violation nonsense, just hit compile let it crunch and you have a binary?

biz guys says to hw guys -> wtf you cant fix that bug and deploy a new version of the fpga before lunch? .. its 9am now?

hw guys say to biz guys -> wtf theres 0 rtl written and you want all rtl finished in 1-2 weeks?

.... and so it goes on.